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Full Custom Design of High Speed SRAM Based on 65nm |
Jia Zhuliang,Du Ming,Lan Tao,Pei Guoxu |
Shenzhen State Microelectronics Co.,Ltd. |
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Abstract As the technology minimum size reaches to 65nm, the chip integration is more and more high, the size of the device is
smaller and the width of the line is also reduced. Because of these factors, the parasitic effect is larger and becomes more important
to SRAM. This article uses the full custom design flow, introduces how to realize SRAM using different function module layout and
IP module. It reduces the impact of interconnect parasitic and guarantees the high speed running of SRAM.
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Published: 16 November 2017
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