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Computer & Telecommunication  2017, Vol. 1 Issue (7): 48-50    DOI:
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A Method of IBIS Model Building
Hou Jianping,Liu Jianxin,Huang Dianwei
Shenzhen State Microelectronics Co.,Ltd.
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Abstract  As a rule, HSIPCE emulator is always used to do validation in the IC’s design. The HSIPCE model is a transistor level model, which has limitations on the system level simulation: long time simulating consumption, easy to reveal the product’s privacy and unfriendly to protect the intellectual property rights. The IBIS model is widely used at the currently system level simulation analysis, it can be adopted by the mainstream of simulation software. As a result, we must prepare the IBIS model, and provide it to our user. This article introduces the IBIS model and the method to build and validate this model.
Key wordssignal integrality      simulate      HSIPCE      IBIS      model     
Published: 16 November 2017
:  TN79  

Cite this article:

Hou Jianping, Liu Jianxin, Huang Dianwei. A Method of IBIS Model Building. Computer & Telecommunication, 2017, 1(7): 48-50.

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https://www.computertelecom.com.cn/EN/     OR     https://www.computertelecom.com.cn/EN/Y2017/V1/I7/48

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